Jayanthy, Test Generation of Crosstalk Delay Faults in VLSI Circuits.
Jayanthy, Test Generation of Crosstalk Delay Faults in VLSI Circuits.
|
Jayanthy, S.; Bhuvaneswari, M. C.: Test Generation of Crosstalk Delay Faults in VLSI Circuits. Singapore, Springer, 2019. XI, 156 p. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped.
Unser Preis: EUR 18,-- |
« Vorigen Titel ansehen
Nächsten Titel ansehen »